Drain extended transistors are useful in power switching circuits and other applications in which high voltage transistors are integrated with logic and other low voltage transistors on a single integrated circuit (IC). The design of the extended drain combines efficient operation as a low side switch in a switching power supply to provide low source-drain resistance (RDSON) during the on state, along with the ability to block or withstand high off-state voltages between the drain and the source or gate. The extended drain provides a relatively lightly doped drift region to extend the high voltage drain away from the edge of the channel region. A planar drift region can be used to increase the reverse blocking voltage beyond the voltage rating of the gate oxide in a particular process. For even higher drain voltage rating, the drain side of the gate polysilicon is spaced from the drift region by a field relief oxide to facilitate more complete depletion of the drift region. Reduced surface field (RESURF) profiled doping can be used for full reverse bias depletion of the drift region. The drift region doping level or dopant concentration is preferably higher near the connection to the transistor channel region to mitigate channel hot carrier injection into the gate and enhance the transistor reliability. One form of drain extended transistors is a laterally diffused metal oxide semiconductor device (LDMOS). In power switching circuits, such as DC-DC converters, a high-side switch and a low-side switch may be fabricated as drain extended transistors. In certain applications, a source/back gate terminal of the high-side device is isolated from circuit ground to facilitate high-voltage operation, and extra circuit area is needed to provide this isolation. In addition, shrinking geometries and alignment tolerances of advanced semiconductor manufacturing processes increase the performance impact of non-uniformities such as center-edge differences in device structure locations.